PIC18F8520T-E/PT【PDF 20/165 页】IC PIC MCU FLASH 16KX16 80TQFP

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PIC18F6520/8520/6620/8620/6720/8720

DS39609B-page 114

2004 Microchip Technology Inc.

10.5

PORTE, TRISE and LATE

Registers

PORTE is an 8-bit wide, bidirectional port. The corre-

sponding data direction register is TRISE. Setting a

TRISE bit (= 1) will make the corresponding PORTE

pin an input (i.e., put the corresponding output driver in

a high-impedance mode). Clearing a TRISE bit (= 0)

will make the corresponding PORTE pin an output (i.e.,

put the contents of the output latch on the selected pin).

Read-modify-write operations on the LATE register,

read and write the latched output value for PORTE.

PORTE is an 8-bit port with Schmitt Trigger input buff-

ers. Each pin is individually configurable as an input or

output. PORTE is multiplexed with the CCP module

(Table 10-9).

On PIC18F8X20 devices, PORTE is also multiplexed

with the system bus as the external memory interface;

the I/O bus is available only when the system bus is

disabled, by setting the EBDIS bit in the MEMCON

Microprocessor or Extended Microcontroller mode,

then the PORTE<7:0> becomes the high byte of the

address/data bus for the external program memory

interface. In Microcontroller mode, the PORTE<2:0>

pins become the control inputs for the Parallel Slave

Port when bit PSPMODE (PSPCON<4>) is set. (Refer

to Section 4.1.1 “PIC18F8X20 Program Memory

Modes” for more information on program memory

modes.)

When the Parallel Slave Port is active, three PORTE

pins (RE0/RD/AD8, RE1/WR/AD9 and RE2/CS/AD10)

function as its control inputs. This automatically occurs

when the PSPMODE bit (PSPCON<4>) is set. Users

must also make certain that bits TRISE<2:0> are set to

configure the pins as digital inputs and the ADCON1

control functions are summarized in Table 10-9.

Pin RE7 can be configured as the alternate peripheral

pin for CCP module 2 when the device is operating in

Microcontroller mode. This is done by clearing the

configuration bit, CCP2MX, in configuration register,

CONFIG3H (CONFIG3H<0>).

EXAMPLE 10-5:

INITIALIZING PORTE

Note:

For PIC18F8X20 (80-pin) devices operat-

ing in Extended Microcontroller mode,

PORTE defaults to the system bus on

Power-on Reset.

CLRF

PORTE

; Initialize PORTE by

; clearing output

; data latches

CLRF

LATE

; Alternate method

; to clear output

; data latches

MOVLW

0x03

; Value used to

; initialize data

; direction

MOVWF

TRISE

; Set RE1:RE0 as inputs

; RE7:RE2 as outputs

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